Searched refs:CLK_APMIXED_DSPPLL (Results 1 – 2 of 2) sorted by relevance
| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt8512.c | 56 PLL(CLK_APMIXED_DSPPLL, 0x0390, 0x039C, 0x00000001,
127 FACTOR0(CLK_TOP_DSPPLL, CLK_APMIXED_DSPPLL, 1, 1),
128 FACTOR0(CLK_TOP_DSPPLL_D2, CLK_APMIXED_DSPPLL, 1, 2),
129 FACTOR0(CLK_TOP_DSPPLL_D4, CLK_APMIXED_DSPPLL, 1, 4),
130 FACTOR0(CLK_TOP_DSPPLL_D8, CLK_APMIXED_DSPPLL, 1, 8),
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| /u-boot/include/dt-bindings/clock/ |
| A D | mt8512-clk.h | 193 #define CLK_APMIXED_DSPPLL 7 macro
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