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Searched refs:CLK_APMIXED_HADDS2PLL (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt7623-clk.h187 #define CLK_APMIXED_HADDS2PLL 10 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt7623.c66 PLL(CLK_APMIXED_HADDS2PLL, 0x2b0, 0x2bc, 0x00000001, 0,
179 FACTOR0(CLK_TOP_HADDS2PLL_98M, CLK_APMIXED_HADDS2PLL, 1, 3),
180 FACTOR0(CLK_TOP_HADDS2PLL_294M, CLK_APMIXED_HADDS2PLL, 1, 1),

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