Searched refs:CLK_APMIXED_MMPLL (Results 1 – 9 of 9) sorted by relevance
| /u-boot/arch/arm/mach-mediatek/mt8516/ |
| A D | init.c | 50 [CLK_APMIXED_MMPLL] = 380000000, in mtk_pll_early_init()
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt8183.c | 58 PLL(CLK_APMIXED_MMPLL, 0x0270, 0x027C, 0x00000001,
162 FACTOR(CLK_TOP_MMPLL_CK, CLK_APMIXED_MMPLL, 1, 1, CLK_PARENT_APMIXED),
163 FACTOR(CLK_TOP_MMPLL_D4, CLK_APMIXED_MMPLL, 1, 4, CLK_PARENT_APMIXED),
167 FACTOR(CLK_TOP_MMPLL_D5, CLK_APMIXED_MMPLL, 1, 5, CLK_PARENT_APMIXED),
172 FACTOR(CLK_TOP_MMPLL_D6, CLK_APMIXED_MMPLL, 1, 6, CLK_PARENT_APMIXED),
173 FACTOR(CLK_TOP_MMPLL_D7, CLK_APMIXED_MMPLL, 1, 7, CLK_PARENT_APMIXED),
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| A D | clk-mt8516.c | 44 PLL(CLK_APMIXED_MMPLL, 0x0160, 0x0170, 0x00000001, 0,
95 FACTOR0(CLK_TOP_MMPLL380M, CLK_APMIXED_MMPLL, 1, 1),
96 FACTOR0(CLK_TOP_MMPLL_D2, CLK_APMIXED_MMPLL, 1, 2),
97 FACTOR0(CLK_TOP_MMPLL_200M, CLK_APMIXED_MMPLL, 1, 3),
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| A D | clk-mt7623.c | 52 PLL(CLK_APMIXED_MMPLL, 0x230, 0x23c, 0x00000001, 0,
146 FACTOR0(CLK_TOP_MMPLL, CLK_APMIXED_MMPLL, 1, 1),
147 FACTOR0(CLK_TOP_MMPLL_D2, CLK_APMIXED_MMPLL, 1, 2),
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| A D | clk-mt8518.c | 44 PLL(CLK_APMIXED_MMPLL, 0x0160, 0x0170, 0x00000001,
98 FACTOR0(CLK_TOP_MMPLL_D2, CLK_APMIXED_MMPLL, 1, 2),
907 CLK_APMIXED_MMPLL,
1139 CLK_APMIXED_MMPLL
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| /u-boot/include/dt-bindings/clock/ |
| A D | mt8516-clk.h | 17 #define CLK_APMIXED_MMPLL 3 macro
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| A D | mt8518-clk.h | 14 #define CLK_APMIXED_MMPLL 3 macro
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| A D | mt8183-clk.h | 17 #define CLK_APMIXED_MMPLL 6 macro
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| A D | mt7623-clk.h | 180 #define CLK_APMIXED_MMPLL 3 macro
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