Searched refs:CLK_APMIXED_MSDCPLL (Results 1 – 6 of 6) sorted by relevance
| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt8183.c | 56 PLL(CLK_APMIXED_MSDCPLL, 0x0250, 0x025C, 0x00000001,
175 FACTOR(CLK_TOP_MSDCPLL_CK, CLK_APMIXED_MSDCPLL, 1,
177 FACTOR(CLK_TOP_MSDCPLL_D2, CLK_APMIXED_MSDCPLL, 1,
179 FACTOR(CLK_TOP_MSDCPLL_D4, CLK_APMIXED_MSDCPLL, 1,
181 FACTOR(CLK_TOP_MSDCPLL_D8, CLK_APMIXED_MSDCPLL, 1,
183 FACTOR(CLK_TOP_MSDCPLL_D16, CLK_APMIXED_MSDCPLL, 1,
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| A D | clk-mt7623.c | 54 PLL(CLK_APMIXED_MSDCPLL, 0x240, 0x24c, 0x00000001, 0,
141 FACTOR0(CLK_TOP_MSDCPLL, CLK_APMIXED_MSDCPLL, 1, 1),
142 FACTOR0(CLK_TOP_MSDCPLL_D2, CLK_APMIXED_MSDCPLL, 1, 2),
143 FACTOR0(CLK_TOP_MSDCPLL_D4, CLK_APMIXED_MSDCPLL, 1, 4),
144 FACTOR0(CLK_TOP_MSDCPLL_D8, CLK_APMIXED_MSDCPLL, 1, 8),
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| A D | clk-mt8512.c | 48 PLL(CLK_APMIXED_MSDCPLL, 0x0350, 0x035C, 0x00000001,
125 FACTOR0(CLK_TOP_MSDCPLL, CLK_APMIXED_MSDCPLL, 1, 1),
126 FACTOR0(CLK_TOP_MSDCPLL_D2, CLK_APMIXED_MSDCPLL, 1, 2),
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| /u-boot/include/dt-bindings/clock/ |
| A D | mt8512-clk.h | 189 #define CLK_APMIXED_MSDCPLL 3 macro
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| A D | mt8183-clk.h | 16 #define CLK_APMIXED_MSDCPLL 5 macro
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| A D | mt7623-clk.h | 181 #define CLK_APMIXED_MSDCPLL 4 macro
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