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Searched refs:CLK_APMIXED_TVDPLL (Results 1 – 6 of 6) sorted by relevance

/u-boot/drivers/clk/mediatek/
A Dclk-mt8183.c63 PLL(CLK_APMIXED_TVDPLL, 0x0260, 0x026C, 0x00000001,
156 FACTOR(CLK_TOP_TVDPLL_CK, CLK_APMIXED_TVDPLL, 1, 1, CLK_PARENT_APMIXED),
158 FACTOR(CLK_TOP_TVDPLL_D4, CLK_APMIXED_TVDPLL, 1, 4, CLK_PARENT_APMIXED),
159 FACTOR(CLK_TOP_TVDPLL_D8, CLK_APMIXED_TVDPLL, 1, 8, CLK_PARENT_APMIXED),
160 FACTOR(CLK_TOP_TVDPLL_D16, CLK_APMIXED_TVDPLL, 1,
A Dclk-mt7623.c56 PLL(CLK_APMIXED_TVDPLL, 0x250, 0x25c, 0x00000001, 0,
153 FACTOR0(CLK_TOP_TVDPLL, CLK_APMIXED_TVDPLL, 1, 1),
154 FACTOR0(CLK_TOP_TVDPLL_D2, CLK_APMIXED_TVDPLL, 1, 2),
155 FACTOR0(CLK_TOP_TVDPLL_D4, CLK_APMIXED_TVDPLL, 1, 4),
A Dclk-mt8518.c50 PLL(CLK_APMIXED_TVDPLL, 0x01C0, 0x01D0, 0x00000001,
112 FACTOR0(CLK_TOP_TVDPLL, CLK_APMIXED_TVDPLL, 1, 1),
/u-boot/include/dt-bindings/clock/
A Dmt8518-clk.h17 #define CLK_APMIXED_TVDPLL 6 macro
A Dmt8183-clk.h19 #define CLK_APMIXED_TVDPLL 8 macro
A Dmt7623-clk.h182 #define CLK_APMIXED_TVDPLL 5 macro

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