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Searched refs:CLK_BUS_MMC2 (Results 1 – 25 of 25) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dsun8i-v3s-ccu.h55 #define CLK_BUS_MMC2 24 macro
A Dsun8i-a23-a33-ccu.h53 #define CLK_BUS_MMC2 28 macro
A Dsun8i-a83t-ccu.h58 #define CLK_BUS_MMC2 24 macro
A Dsun50i-a64-ccu.h55 #define CLK_BUS_MMC2 33 macro
A Dsun8i-h3-ccu.h56 #define CLK_BUS_MMC2 24 macro
A Dsun50i-h616-ccu.h51 #define CLK_BUS_MMC2 65 macro
A Dsun50i-h6-ccu.h55 #define CLK_BUS_MMC2 69 macro
A Dsun8i-r40-ccu.h53 #define CLK_BUS_MMC2 34 macro
/u-boot/drivers/clk/sunxi/
A Dclk_v3s.c19 [CLK_BUS_MMC2] = GATE(0x060, BIT(10)),
A Dclk_a23.c19 [CLK_BUS_MMC2] = GATE(0x060, BIT(10)),
A Dclk_a64.c19 [CLK_BUS_MMC2] = GATE(0x060, BIT(10)),
A Dclk_a83t.c19 [CLK_BUS_MMC2] = GATE(0x060, BIT(10)),
A Dclk_h6.c19 [CLK_BUS_MMC2] = GATE(0x84c, BIT(2)),
A Dclk_h3.c19 [CLK_BUS_MMC2] = GATE(0x060, BIT(10)),
A Dclk_h616.c18 [CLK_BUS_MMC2] = GATE(0x84c, BIT(2)),
A Dclk_r40.c19 [CLK_BUS_MMC2] = GATE(0x060, BIT(10)),
/u-boot/arch/arm/dts/
A Dsun50i-h5.dtsi204 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
A Dsun8i-h3.dtsi268 clocks = <&ccu CLK_BUS_MMC2>,
A Dsun8i-v3s.dtsi246 clocks = <&ccu CLK_BUS_MMC2>,
A Dsun50i-h616.dtsi283 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
A Dsun8i-a23-a33.dtsi177 clocks = <&ccu CLK_BUS_MMC2>,
A Dsun8i-r40.dtsi217 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
A Dsun50i-h6.dtsi464 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
A Dsun8i-a83t.dtsi533 clocks = <&ccu CLK_BUS_MMC2>,
A Dsun50i-a64.dtsi511 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;

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