Searched refs:CLK_BUS_UART0 (Results 1 – 25 of 27) sorted by relevance
12
| /u-boot/include/dt-bindings/clock/ |
| A D | sun8i-v3s-ccu.h | 71 #define CLK_BUS_UART0 40 macro
|
| A D | sun8i-a23-a33-ccu.h | 79 #define CLK_BUS_UART0 54 macro
|
| A D | sun8i-a83t-ccu.h | 90 #define CLK_BUS_UART0 53 macro
|
| A D | sun50i-a64-ccu.h | 89 #define CLK_BUS_UART0 67 macro
|
| A D | sun8i-h3-ccu.h | 94 #define CLK_BUS_UART0 62 macro
|
| A D | sun50i-h616-ccu.h | 52 #define CLK_BUS_UART0 66 macro
|
| A D | sun9i-a80-ccu.h | 155 #define CLK_BUS_UART0 124 macro
|
| A D | sun50i-h6-ccu.h | 56 #define CLK_BUS_UART0 70 macro
|
| A D | sun8i-r40-ccu.h | 115 #define CLK_BUS_UART0 96 macro
|
| /u-boot/drivers/clk/sunxi/ |
| A D | clk_v3s.c | 23 [CLK_BUS_UART0] = GATE(0x06c, BIT(16)),
|
| A D | clk_a23.c | 26 [CLK_BUS_UART0] = GATE(0x06c, BIT(16)),
|
| A D | clk_a64.c | 29 [CLK_BUS_UART0] = GATE(0x06c, BIT(16)),
|
| A D | clk_a80.c | 28 [CLK_BUS_UART0] = GATE(0x594, BIT(16)),
|
| A D | clk_a83t.c | 28 [CLK_BUS_UART0] = GATE(0x06c, BIT(16)),
|
| A D | clk_h6.c | 20 [CLK_BUS_UART0] = GATE(0x90c, BIT(0)),
|
| A D | clk_h3.c | 33 [CLK_BUS_UART0] = GATE(0x06c, BIT(16)),
|
| A D | clk_h616.c | 20 [CLK_BUS_UART0] = GATE(0x90c, BIT(0)),
|
| A D | clk_r40.c | 35 [CLK_BUS_UART0] = GATE(0x06c, BIT(16)),
|
| /u-boot/arch/arm/dts/ |
| A D | sun8i-v3s.dtsi | 417 clocks = <&ccu CLK_BUS_UART0>;
|
| A D | sun50i-h616.dtsi | 306 clocks = <&ccu CLK_BUS_UART0>;
|
| A D | sun8i-a23-a33.dtsi | 415 clocks = <&ccu CLK_BUS_UART0>;
|
| A D | sun8i-r40.dtsi | 420 clocks = <&ccu CLK_BUS_UART0>;
|
| A D | sun50i-h6.dtsi | 482 clocks = <&ccu CLK_BUS_UART0>;
|
| A D | sun8i-a83t.dtsi | 839 clocks = <&ccu CLK_BUS_UART0>;
|
| A D | sunxi-h3-h5.dtsi | 673 clocks = <&ccu CLK_BUS_UART0>;
|
Completed in 22 milliseconds
12