Home
last modified time | relevance | path

Searched refs:CLK_BUS_UART3 (Results 1 – 23 of 23) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dsun8i-a23-a33-ccu.h82 #define CLK_BUS_UART3 57 macro
A Dsun8i-a83t-ccu.h93 #define CLK_BUS_UART3 56 macro
A Dsun50i-a64-ccu.h92 #define CLK_BUS_UART3 70 macro
A Dsun8i-h3-ccu.h97 #define CLK_BUS_UART3 65 macro
A Dsun50i-h616-ccu.h55 #define CLK_BUS_UART3 69 macro
A Dsun9i-a80-ccu.h158 #define CLK_BUS_UART3 127 macro
A Dsun50i-h6-ccu.h59 #define CLK_BUS_UART3 73 macro
A Dsun8i-r40-ccu.h118 #define CLK_BUS_UART3 99 macro
/u-boot/drivers/clk/sunxi/
A Dclk_a23.c29 [CLK_BUS_UART3] = GATE(0x06c, BIT(19)),
A Dclk_a64.c32 [CLK_BUS_UART3] = GATE(0x06c, BIT(19)),
A Dclk_a80.c31 [CLK_BUS_UART3] = GATE(0x594, BIT(19)),
A Dclk_a83t.c31 [CLK_BUS_UART3] = GATE(0x06c, BIT(19)),
A Dclk_h6.c23 [CLK_BUS_UART3] = GATE(0x90c, BIT(3)),
A Dclk_h3.c36 [CLK_BUS_UART3] = GATE(0x06c, BIT(19)),
A Dclk_h616.c23 [CLK_BUS_UART3] = GATE(0x90c, BIT(3)),
A Dclk_r40.c38 [CLK_BUS_UART3] = GATE(0x06c, BIT(19)),
/u-boot/arch/arm/dts/
A Dsun50i-h616.dtsi339 clocks = <&ccu CLK_BUS_UART3>;
A Dsun8i-a23-a33.dtsi454 clocks = <&ccu CLK_BUS_UART3>;
A Dsun8i-r40.dtsi453 clocks = <&ccu CLK_BUS_UART3>;
A Dsun50i-h6.dtsi515 clocks = <&ccu CLK_BUS_UART3>;
A Dsunxi-h3-h5.dtsi712 clocks = <&ccu CLK_BUS_UART3>;
A Dsun50i-a64.dtsi922 clocks = <&ccu CLK_BUS_UART3>;
A Dsun9i-a80.dtsi1043 clocks = <&ccu CLK_BUS_UART3>;

Completed in 24 milliseconds