Searched refs:CLK_CODEC (Results 1 – 14 of 14) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | sun5i-ccu.h | 99 #define CLK_CODEC 95 macro
|
| A D | sun6i-a31-ccu.h | 167 #define CLK_CODEC 135 macro
|
| A D | sun8i-r40-ccu.h | 171 #define CLK_CODEC 151 macro
|
| A D | sun4i-a10-ccu.h | 195 #define CLK_CODEC 160 macro
|
| /u-boot/arch/arm/include/asm/arch-rockchip/ |
| A D | clock.h | 32 CLK_CODEC, enumerator
|
| /u-boot/arch/arm/mach-rockchip/rk3288/ |
| A D | rk3288.c | 159 { "cpll", CLK_CODEC }, in do_clock()
|
| /u-boot/drivers/clk/rockchip/ |
| A D | clk_rk3128.c | 444 rkclk_set_pll(cru, CLK_CODEC, &cpll_config); in rk3128_vop_set_clk()
477 parent = rkclk_pll_get_rate(cru, CLK_CODEC); in rk3128_vop_get_rate()
|
| A D | clk_rk3328.c | 228 case CLK_CODEC: in rkclk_set_pll()
294 rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg); in rkclk_init()
|
| A D | clk_rk3188.c | 391 rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg, has_bwadj); in rkclk_init()
|
| A D | clk_rk3288.c | 442 rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg); in rkclk_init()
|
| /u-boot/arch/arm/dts/ |
| A D | sun5i.dtsi | 574 clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>;
|
| A D | sun4i-a10.dtsi | 844 clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>;
|
| A D | sun6i-a31.dtsi | 923 clocks = <&ccu CLK_APB1_CODEC>, <&ccu CLK_CODEC>;
|
| A D | sun7i-a20.dtsi | 1092 clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>;
|
Completed in 21 milliseconds