Searched refs:CLK_DIV_CORE1_VAL (Results 1 – 2 of 2) sorted by relevance
| /u-boot/arch/arm/mach-exynos/ | ||
| A D | exynos5_setup.h | 136 #define CLK_DIV_CORE1_VAL 0x07070700 macro |
| A D | clock_init_exynos5.c | 674 writel(CLK_DIV_CORE1_VAL, &clk->div_core1); in exynos5250_system_clock_init() |
Completed in 7 milliseconds