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Searched refs:CLK_DIV_G2D (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-exynos/
A Dexynos5_setup.h228 #define CLK_DIV_G2D 0x00000010 macro
A Dclock_init_exynos5.c962 writel(CLK_DIV_G2D, &clk->div_g2d); in exynos5420_system_clock_init()

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