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Searched refs:CLK_ETHSYS_GDMA (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt7623-clk.h404 #define CLK_ETHSYS_GDMA 5 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt7623.c721 GATE_ETH_HIF1(CLK_ETHSYS_GDMA, CLK_TOP_ETHIF_SEL, 14),

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