Searched refs:CLK_ETHSYS_GP1 (Results 1 – 3 of 3) sorted by relevance

/u-boot/include/dt-bindings/clock/
A D	mt7623-clk.h	402 #define CLK_ETHSYS_GP1 3 macro
/u-boot/arch/arm/dts/
A D	mt7623.dtsi	438 <&ethsys CLK_ETHSYS_GP1>,
/u-boot/drivers/clk/mediatek/
A D	clk-mt7623.c	719 GATE_ETH_HIF1(CLK_ETHSYS_GP1, CLK_TOP_ETHPLL_500M, 8),

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