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Searched refs:CLK_HCLK_PLL_FEEDBACK_DIV_MASK (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-lpc32xx/
A Dclk.c40 m_div = ((val & CLK_HCLK_PLL_FEEDBACK_DIV_MASK) >> 1) + 1; in get_hclk_pll_rate()
/u-boot/arch/arm/include/asm/arch-lpc32xx/
A Dclk.h115 #define CLK_HCLK_PLL_FEEDBACK_DIV_MASK (0xFF << 1) macro

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