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Searched refs:CLK_HIFSYS_USB0PHY (Results 1 – 3 of 3) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt7623-clk.h391 #define CLK_HIFSYS_USB0PHY 0 macro
/u-boot/arch/arm/dts/
A Dmt7623.dtsi360 clocks = <&hifsys CLK_HIFSYS_USB0PHY>, <&topckgen CLK_TOP_ETHIF_SEL>;
/u-boot/drivers/clk/mediatek/
A Dclk-mt7623.c727 GATE_ETH_HIF1(CLK_HIFSYS_USB0PHY, CLK_TOP_ETHPLL_500M, 21),

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