Searched refs:CLK_IFR_ETH_25M_SEL (Results 1 – 2 of 2) sorted by relevance
/u-boot/include/dt-bindings/clock/ | ||
A D | mt8516-clk.h | 220 #define CLK_IFR_ETH_25M_SEL 1 macro |
/u-boot/drivers/clk/mediatek/ | ||
A D | clk-mt8516.c | 688 GATE_TOP2(CLK_TOP_FETH_25M, CLK_IFR_ETH_25M_SEL, 21), |
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