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Searched refs:CLK_PERI_AUXADC_PD (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt7622-clk.h153 #define CLK_PERI_AUXADC_PD 21 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt7622.c445 GATE_PERI0(CLK_PERI_AUXADC_PD, CLK_XTAL, 27),

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