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Searched refs:CLK_PERI_MSDC30_1_PD (Results 1 – 5 of 5) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt7629-clk.h144 #define CLK_PERI_MSDC30_1_PD 10 macro
A Dmt7622-clk.h143 #define CLK_PERI_MSDC30_1_PD 11 macro
/u-boot/arch/arm/dts/
A Dmt7622.dtsi194 clocks = <&pericfg CLK_PERI_MSDC30_1_PD>,
/u-boot/drivers/clk/mediatek/
A Dclk-mt7622.c435 GATE_PERI0(CLK_PERI_MSDC30_1_PD, CLK_TOP_MSDC30_1_SEL, 14),
A Dclk-mt7629.c482 GATE_PERI0(CLK_PERI_MSDC30_1_PD, CLK_TOP_MSDC30_1, 14),

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