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Searched refs:CLK_PERI_PWM5 (Results 1 – 3 of 3) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt7623-clk.h221 #define CLK_PERI_PWM5 6 macro
/u-boot/arch/arm/dts/
A Dmt7623.dtsi461 <&pericfg CLK_PERI_PWM5>;
/u-boot/drivers/clk/mediatek/
A Dclk-mt7623.c655 GATE_PERI0(CLK_PERI_PWM5, CLK_TOP_AXISEL_D4, 6),

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