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Searched refs:CLK_PERI_PWM5_PD (Results 1 – 5 of 5) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt7629-clk.h139 #define CLK_PERI_PWM5_PD 5 macro
A Dmt7622-clk.h137 #define CLK_PERI_PWM5_PD 5 macro
/u-boot/arch/arm/dts/
A Dmt7622.dtsi419 <&pericfg CLK_PERI_PWM5_PD>,
/u-boot/drivers/clk/mediatek/
A Dclk-mt7622.c429 GATE_PERI0(CLK_PERI_PWM5_PD, CLK_XTAL, 6),
A Dclk-mt7629.c477 GATE_PERI0(CLK_PERI_PWM5_PD, CLK_TOP_PWM_QTR_26M, 6),

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