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Searched refs:CLK_PERI_SPI0_PD (Results 1 – 4 of 4) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt7629-clk.h151 #define CLK_PERI_SPI0_PD 17 macro
A Dmt7622-clk.h154 #define CLK_PERI_SPI0_PD 22 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt7622.c446 GATE_PERI0(CLK_PERI_SPI0_PD, CLK_TOP_SPI0_SEL, 28),
A Dclk-mt7629.c489 GATE_PERI0(CLK_PERI_SPI0_PD, CLK_TOP_SPI, 28),

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