Searched refs:CLK_PERI_UART0 (Results 1 – 3 of 3) sorted by relevance

/u-boot/include/dt-bindings/clock/
A D	mt7623-clk.h	234 #define CLK_PERI_UART0 19 macro
/u-boot/arch/arm/dts/
A D	mt7623.dtsi	188 <&pericfg CLK_PERI_UART0>;
/u-boot/drivers/clk/mediatek/
A D	clk-mt7623.c	668 GATE_PERI0(CLK_PERI_UART0, CLK_TOP_AXI_SEL, 19),

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