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Searched refs:CLK_ROOT_POST_DIV_MASK (Results 1 – 5 of 5) sorted by relevance

/u-boot/arch/arm/include/asm/arch-imx8m/
A Dclock.h239 #define CLK_ROOT_POST_DIV_MASK 0x3f macro
/u-boot/arch/arm/mach-imx/mx7/
A Dclock_slice.c541 reg &= ~CLK_ROOT_POST_DIV_MASK; in clock_set_postdiv()
564 val &= CLK_ROOT_POST_DIV_MASK; in clock_get_postdiv()
/u-boot/arch/arm/mach-imx/imx8m/
A Dclock_imx8mm.c865 val &= ~(CLK_ROOT_PRE_DIV_MASK | CLK_ROOT_POST_DIV_MASK); in imx_eqos_txclk_set_rate()
A Dclock_slice.c1833 mask = CLK_ROOT_POST_DIV_MASK; in clock_get_postdiv()
/u-boot/arch/arm/include/asm/arch-mx7/
A Dcrm_regs.h2096 #define CLK_ROOT_POST_DIV_MASK 0x0000003f macro
2098 #define CLK_ROOT_POST_DIV(n) ((n << CLK_ROOT_POST_DIV_SHIFT) & CLK_ROOT_POST_DIV_MASK)

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