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Searched refs:CLK_TOP_10M_SEL (Results 1 – 3 of 3) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt7629-clk.h121 #define CLK_TOP_10M_SEL 107 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt7629.c139 FACTOR1(CLK_TOP_10M_INFRAO, CLK_TOP_10M_SEL, 1, 1),
417 MUX_GATE(CLK_TOP_10M_SEL, gpt10m_parents, 0xC0, 16, 1, 23),
/u-boot/arch/arm/dts/
A Dmt7629.dtsi85 <&topckgen CLK_TOP_10M_SEL>;

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