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Searched refs:CLK_TOP_4MHZ (Results 1 – 4 of 4) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt7629-clk.h25 #define CLK_TOP_4MHZ 12 macro
A Dmt7622-clk.h24 #define CLK_TOP_4MHZ 12 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt7622.c96 FACTOR0(CLK_TOP_4MHZ, CLK_APMIXED_ETH1PLL, 1, 125),
473 GATE_PCIE(CLK_PCIE_P1_OBFF_EN, CLK_TOP_4MHZ, 13),
479 GATE_PCIE(CLK_PCIE_P0_OBFF_EN, CLK_TOP_4MHZ, 19),
A Dclk-mt7629.c90 FACTOR0(CLK_TOP_4MHZ, CLK_APMIXED_ETH1PLL, 1, 125),

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