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Searched refs:CLK_TOP_AP2WBHIF_SEL (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt7629-clk.h102 #define CLK_TOP_AP2WBHIF_SEL 88 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt7629.c387 MUX_GATE(CLK_TOP_AP2WBHIF_SEL, ap2wbmcu_parents, 0x70, 24, 3, 31),

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