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Searched refs:CLK_TOP_APLL1 (Results 1 – 6 of 6) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8512-clk.h46 #define CLK_TOP_APLL1 35 macro
A Dmt8516-clk.h57 #define CLK_TOP_APLL1 33 macro
A Dmt8518-clk.h54 #define CLK_TOP_APLL1 32 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8512.c111 FACTOR0(CLK_TOP_APLL1, CLK_APMIXED_APLL1, 1, 1),
227 CLK_TOP_APLL1,
262 CLK_TOP_APLL1
400 CLK_TOP_APLL1,
A Dclk-mt8516.c99 FACTOR0(CLK_TOP_APLL1, CLK_APMIXED_APLL1, 1, 1),
100 FACTOR1(CLK_TOP_APLL1_D2, CLK_TOP_APLL1, 1, 2),
404 CLK_TOP_APLL1
A Dclk-mt8518.c100 FACTOR0(CLK_TOP_APLL1, CLK_APMIXED_APLL1, 1, 1),
101 FACTOR1(CLK_TOP_APLL1_D4, CLK_TOP_APLL1, 1, 4),
625 CLK_TOP_APLL1,

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