Searched refs:CLK_TOP_APLL1_D2 (Results 1 – 6 of 6) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt8512-clk.h | 47 #define CLK_TOP_APLL1_D2 36 macro
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| A D | mt8516-clk.h | 58 #define CLK_TOP_APLL1_D2 34 macro
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| A D | mt8183-clk.h | 78 #define CLK_TOP_APLL1_D2 42 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt8512.c | 112 FACTOR0(CLK_TOP_APLL1_D2, CLK_APMIXED_APLL1, 1, 2),
228 CLK_TOP_APLL1_D2,
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| A D | clk-mt8516.c | 100 FACTOR1(CLK_TOP_APLL1_D2, CLK_TOP_APLL1, 1, 2),
716 GATE_TOP4_I(CLK_TOP_RG_APLL1_D2_EN, CLK_TOP_APLL1_D2, 8),
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| A D | clk-mt8183.c | 149 FACTOR(CLK_TOP_APLL1_D2, CLK_APMIXED_APLL1, 1, 2, CLK_PARENT_APMIXED),
500 CLK_TOP_APLL1_D2,
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Completed in 11 milliseconds