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Searched refs:CLK_TOP_APLL2 (Results 1 – 6 of 6) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8512-clk.h52 #define CLK_TOP_APLL2 41 macro
A Dmt8516-clk.h61 #define CLK_TOP_APLL2 37 macro
A Dmt8518-clk.h56 #define CLK_TOP_APLL2 34 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8512.c117 FACTOR0(CLK_TOP_APLL2, CLK_APMIXED_APLL2, 1, 1),
238 CLK_TOP_APLL2,
267 CLK_TOP_APLL2
401 CLK_TOP_APLL2,
A Dclk-mt8518.c102 FACTOR0(CLK_TOP_APLL2, CLK_APMIXED_APLL2, 1, 1),
103 FACTOR1(CLK_TOP_APLL2_D2, CLK_TOP_APLL2, 1, 2),
104 FACTOR1(CLK_TOP_APLL2_D3, CLK_TOP_APLL2, 1, 3),
105 FACTOR1(CLK_TOP_APLL2_D4, CLK_TOP_APLL2, 1, 4),
106 FACTOR1(CLK_TOP_APLL2_D8, CLK_TOP_APLL2, 1, 8),
461 CLK_TOP_APLL2,
632 CLK_TOP_APLL2,
A Dclk-mt8516.c103 FACTOR0(CLK_TOP_APLL2, CLK_APMIXED_APLL2, 1, 1),
104 FACTOR1(CLK_TOP_APLL2_D2, CLK_TOP_APLL2, 1, 2),
409 CLK_TOP_APLL2

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