Searched refs:CLK_TOP_APLL2_D2 (Results 1 – 8 of 8) sorted by relevance
/u-boot/include/dt-bindings/clock/ |
A D | mt8512-clk.h | 53 #define CLK_TOP_APLL2_D2 42 macro
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A D | mt8516-clk.h | 62 #define CLK_TOP_APLL2_D2 38 macro
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A D | mt8518-clk.h | 57 #define CLK_TOP_APLL2_D2 35 macro
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A D | mt8183-clk.h | 82 #define CLK_TOP_APLL2_D2 46 macro
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/u-boot/drivers/clk/mediatek/ |
A D | clk-mt8512.c | 118 FACTOR0(CLK_TOP_APLL2_D2, CLK_APMIXED_APLL2, 1, 2), 239 CLK_TOP_APLL2_D2,
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A D | clk-mt8516.c | 104 FACTOR1(CLK_TOP_APLL2_D2, CLK_TOP_APLL2, 1, 2), 719 GATE_TOP4_I(CLK_TOP_RG_APLL2_D2_EN, CLK_TOP_APLL2_D2, 11),
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A D | clk-mt8183.c | 153 FACTOR(CLK_TOP_APLL2_D2, CLK_APMIXED_APLL2, 1, 2, CLK_PARENT_APMIXED), 507 CLK_TOP_APLL2_D2,
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A D | clk-mt8518.c | 103 FACTOR1(CLK_TOP_APLL2_D2, CLK_TOP_APLL2, 1, 2), 462 CLK_TOP_APLL2_D2,
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Completed in 14 milliseconds