Searched refs:CLK_TOP_APLL2_D4 (Results 1 – 8 of 8) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt8512-clk.h | 55 #define CLK_TOP_APLL2_D4 44 macro
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| A D | mt8516-clk.h | 63 #define CLK_TOP_APLL2_D4 39 macro
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| A D | mt8518-clk.h | 59 #define CLK_TOP_APLL2_D4 37 macro
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| A D | mt8183-clk.h | 83 #define CLK_TOP_APLL2_D4 47 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt8512.c | 120 FACTOR0(CLK_TOP_APLL2_D4, CLK_APMIXED_APLL2, 1, 4),
212 CLK_TOP_APLL2_D4
241 CLK_TOP_APLL2_D4,
307 CLK_TOP_APLL2_D4,
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| A D | clk-mt8516.c | 105 FACTOR1(CLK_TOP_APLL2_D4, CLK_TOP_RG_APLL2_D2_EN, 1, 2),
720 GATE_TOP4_I(CLK_TOP_RG_APLL2_D4_EN, CLK_TOP_APLL2_D4, 12),
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| A D | clk-mt8183.c | 154 FACTOR(CLK_TOP_APLL2_D4, CLK_APMIXED_APLL2, 1, 4, CLK_PARENT_APMIXED),
508 CLK_TOP_APLL2_D4,
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| A D | clk-mt8518.c | 105 FACTOR1(CLK_TOP_APLL2_D4, CLK_TOP_APLL2, 1, 4),
380 CLK_TOP_APLL2_D4
463 CLK_TOP_APLL2_D4,
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Completed in 15 milliseconds