Searched refs:CLK_TOP_APLL2_D8 (Results 1 – 8 of 8) sorted by relevance
/u-boot/include/dt-bindings/clock/ |
A D | mt8512-clk.h | 56 #define CLK_TOP_APLL2_D8 45 macro
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A D | mt8516-clk.h | 64 #define CLK_TOP_APLL2_D8 40 macro
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A D | mt8518-clk.h | 60 #define CLK_TOP_APLL2_D8 38 macro
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A D | mt8183-clk.h | 84 #define CLK_TOP_APLL2_D8 48 macro
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/u-boot/drivers/clk/mediatek/ |
A D | clk-mt8512.c | 121 FACTOR0(CLK_TOP_APLL2_D8, CLK_APMIXED_APLL2, 1, 8), 219 CLK_TOP_APLL2_D8, 242 CLK_TOP_APLL2_D8,
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A D | clk-mt8516.c | 106 FACTOR1(CLK_TOP_APLL2_D8, CLK_TOP_RG_APLL2_D4_EN, 1, 2), 721 GATE_TOP4_I(CLK_TOP_RG_APLL2_D8_EN, CLK_TOP_APLL2_D8, 13),
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A D | clk-mt8183.c | 155 FACTOR(CLK_TOP_APLL2_D8, CLK_APMIXED_APLL2, 1, 8, CLK_PARENT_APMIXED), 509 CLK_TOP_APLL2_D8
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A D | clk-mt8518.c | 106 FACTOR1(CLK_TOP_APLL2_D8, CLK_TOP_APLL2, 1, 8), 803 CLK_TOP_APLL2_D8
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Completed in 14 milliseconds