Searched refs:CLK_TOP_APLL2_SEL (Results 1 – 2 of 2) sorted by relevance
/u-boot/include/dt-bindings/clock/ | ||
A D | mt7622-clk.h | 101 #define CLK_TOP_APLL2_SEL 88 macro |
/u-boot/drivers/clk/mediatek/ | ||
A D | clk-mt7622.c | 362 MUX(CLK_TOP_APLL2_SEL, apll1_ck_parents, 0x120, 7, 1), |
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