Searched refs:CLK_TOP_APLL_SEL (Results 1 – 2 of 2) sorted by relevance
| /u-boot/include/dt-bindings/clock/ | ||
| A D | mt7623-clk.h | 123 #define CLK_TOP_APLL_SEL 109 macro |
| /u-boot/drivers/clk/mediatek/ | ||
| A D | clk-mt7623.c | 539 MUX_GATE(CLK_TOP_APLL_SEL, apll_parents, 0x90, 16, 3, 23), |
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