CLK_TOP_AUD_ENGEN2_SEL (reference) in projects: u-boot

Searched refs:CLK_TOP_AUD_ENGEN2_SEL (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A D	mt8516-clk.h	`96 #define CLK_TOP_AUD_ENGEN2_SEL 72 macro`
/u-boot/drivers/clk/mediatek/
A D	clk-mt8516.c	`521 MUX(CLK_TOP_AUD_ENGEN2_SEL, aud_engen2_parents, 0x040, 26, 2), 707 GATE_TOP3(CLK_TOP_RG_AUD_ENGEN2, CLK_TOP_AUD_ENGEN2_SEL, 11),`

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