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Searched refs:CLK_TOP_AUD_I2S3_M_SEL (Results 1 – 4 of 4) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8516-clk.h101 #define CLK_TOP_AUD_I2S3_M_SEL 77 macro
A Dmt8518-clk.h102 #define CLK_TOP_AUD_I2S3_M_SEL 80 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8516.c527 MUX(CLK_TOP_AUD_I2S3_M_SEL, aud_i2s0_m_parents, 0x044, 15, 1),
A Dclk-mt8518.c1201 MUX(CLK_TOP_AUD_I2S3_M_SEL, aud_i2s0_m_parents, 0x044, 15, 1),

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