Searched refs:CLK_TOP_AUD_INTBUS_SEL (Results 1 – 8 of 8) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt8512-clk.h | 80 #define CLK_TOP_AUD_INTBUS_SEL 69 macro
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| A D | mt7629-clk.h | 104 #define CLK_TOP_AUD_INTBUS_SEL 90 macro
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| A D | mt8516-clk.h | 82 #define CLK_TOP_AUD_INTBUS_SEL 58 macro
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| A D | mt7622-clk.h | 86 #define CLK_TOP_AUD_INTBUS_SEL 73 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7622.c | 338 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, aud_intbus_parents, 0x80, 8, 2, 15),
387 GATE_INFRA(CLK_INFRA_AUDIO_PD, CLK_TOP_AUD_INTBUS_SEL, 5),
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| A D | clk-mt7629.c | 137 FACTOR1(CLK_TOP_F_FAUD_INTBUS, CLK_TOP_AUD_INTBUS_SEL, 1, 1),
391 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, aud_intbus_parents, 0x80, 8, 2, 15),
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| A D | clk-mt8512.c | 486 MUX_CLR_SET_UPD_FLAGS(CLK_TOP_AUD_INTBUS_SEL, aud_intbus_parents,
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| A D | clk-mt8516.c | 505 MUX(CLK_TOP_AUD_INTBUS_SEL, aud_intbus_parents, 0x000, 27, 3),
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Completed in 13 milliseconds