Searched refs:CLK_TOP_AUD_SPDIFIN_SEL (Results 1 – 4 of 4) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt8516-clk.h | 107 #define CLK_TOP_AUD_SPDIFIN_SEL 83 macro
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| A D | mt8518-clk.h | 106 #define CLK_TOP_AUD_SPDIFIN_SEL 84 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt8516.c | 534 MUX(CLK_TOP_AUD_SPDIFIN_SEL, aud_spdifin_parents, 0x07c, 3, 1),
710 GATE_TOP3(CLK_TOP_RG_AUD_SPDIF_IN, CLK_TOP_AUD_SPDIFIN_SEL, 14),
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| A D | clk-mt8518.c | 1206 MUX(CLK_TOP_AUD_SPDIFIN_SEL, aud_spdifin_parents, 0x07c, 2, 2),
1455 GATE_TOP4(CLK_TOP_AUD_SPDIF_IN, CLK_TOP_AUD_SPDIFIN_SEL, 14),
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