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Searched refs:CLK_TOP_AUD_SPDIF_SEL (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8512-clk.h88 #define CLK_TOP_AUD_SPDIF_SEL 77 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8512.c512 MUX_CLR_SET_UPD_FLAGS(CLK_TOP_AUD_SPDIF_SEL, aud_spdif_parents,

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