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Searched refs:CLK_TOP_CAMTG_SEL (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt7623-clk.h108 #define CLK_TOP_CAMTG_SEL 94 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt7623.c520 MUX_GATE(CLK_TOP_CAMTG_SEL, camtg_parents, 0x50, 24, 3, 31),

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