Searched refs:CLK_TOP_CMSYS_SEL (Results 1 – 4 of 4) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt8518-clk.h | 122 #define CLK_TOP_CMSYS_SEL 100 macro
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| A D | mt7623-clk.h | 140 #define CLK_TOP_CMSYS_SEL 126 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt8518.c | 1224 MUX(CLK_TOP_CMSYS_SEL, cmsys_parents, 0xC4, 28, 3),
1474 GATE_TOP5_I(CLK_TOP_CMSYS, CLK_TOP_CMSYS_SEL, 25),
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| A D | clk-mt7623.c | 562 MUX_GATE(CLK_TOP_CMSYS_SEL, cmsys_parents, 0xE0, 16, 4, 23),
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