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Searched refs:CLK_TOP_DPI0_SEL (Results 1 – 4 of 4) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8512-clk.h109 #define CLK_TOP_DPI0_SEL 98 macro
A Dmt7623-clk.h119 #define CLK_TOP_DPI0_SEL 105 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8512.c581 MUX_CLR_SET_UPD_FLAGS(CLK_TOP_DPI0_SEL, dpi0_parents,
A Dclk-mt7623.c534 MUX_GATE(CLK_TOP_DPI0_SEL, dpi0_tve_parents, 0x80, 16, 3, 23),

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