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Searched refs:CLK_TOP_EMI_DDRPHY_SEL (Results 1 – 4 of 4) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8516-clk.h72 #define CLK_TOP_EMI_DDRPHY_SEL 48 macro
A Dmt8518-clk.h86 #define CLK_TOP_EMI_DDRPHY_SEL 64 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8516.c495 MUX(CLK_TOP_EMI_DDRPHY_SEL, emi_ddrphy_parents, 0x000, 2, 1),
A Dclk-mt8518.c1182 MUX(CLK_TOP_EMI_DDRPHY_SEL, emi_ddrphy_parents, 0x000, 2, 1),

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