CLK_TOP_EMMC_HCLK_SEL (reference) in projects: u-boot

Searched refs:CLK_TOP_EMMC_HCLK_SEL (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A D	mt7623-clk.h	`126 #define CLK_TOP_EMMC_HCLK_SEL 112 macro`
/u-boot/drivers/clk/mediatek/
A D	clk-mt7623.c	`543 MUX_GATE(CLK_TOP_EMMC_HCLK_SEL, emmc_hclk_parents, 0xA0, 24, 2, 31), 666 GATE_PERI0(CLK_PERI_MSDC50_3, CLK_TOP_EMMC_HCLK_SEL, 17),`

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