Searched refs:CLK_TOP_ETH_500M (Results 1 – 5 of 5) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt7629-clk.h | 27 #define CLK_TOP_ETH_500M 14 macro
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| A D | mt7622-clk.h | 67 #define CLK_TOP_ETH_500M 55 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7622.c | 139 FACTOR0(CLK_TOP_ETH_500M, CLK_APMIXED_ETH1PLL, 1, 1),
506 GATE_ETH(CLK_ETH_ESW_EN, CLK_TOP_ETH_500M, 6),
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| A D | clk-mt7629.c | 92 FACTOR0(CLK_TOP_ETH_500M, CLK_APMIXED_ETH1PLL, 1, 1),
520 GATE_ETH1(CLK_ETH_ESW_EN, CLK_TOP_ETH_500M, 16),
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| /u-boot/arch/arm/dts/ |
| A D | mt7622.dtsi | 311 clocks = <&topckgen CLK_TOP_ETH_500M>;
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