Home
last modified time | relevance | path

Searched refs:CLK_TOP_FA1SYS_SEL (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8518-clk.h116 #define CLK_TOP_FA1SYS_SEL 94 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8518.c1217 MUX(CLK_TOP_FA1SYS_SEL, fa1sys_parents, 0xc0, 27, 3),
1468 GATE_TOP5_I(CLK_TOP_FA1SYS, CLK_TOP_FA1SYS_SEL, 9),

Completed in 5 milliseconds