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Searched refs:CLK_TOP_FAUD_INTBUS_SEL (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8518-clk.h130 #define CLK_TOP_FAUD_INTBUS_SEL 108 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8518.c1235 MUX(CLK_TOP_FAUD_INTBUS_SEL, faud_intbus_parents, 0xD4, 8, 8),
1464 GATE_TOP5_I(CLK_TOP_FAUD_INTBUS, CLK_TOP_FAUD_INTBUS_SEL, 5),

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