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Searched refs:CLK_TOP_GRAPH_ECLK_SEL (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8518-clk.h112 #define CLK_TOP_GRAPH_ECLK_SEL 90 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8518.c1213 MUX(CLK_TOP_GRAPH_ECLK_SEL, graph_eclk_parents, 0xc0, 8, 4),
1461 GATE_TOP5_I(CLK_TOP_GRAPH_E, CLK_TOP_GRAPH_ECLK_SEL, 2),

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