Searched refs:CLK_TOP_HDMIRX_BIST_SEL (Results 1 – 2 of 2) sorted by relevance
131 #define CLK_TOP_HDMIRX_BIST_SEL 117 macro
550 MUX_GATE(CLK_TOP_HDMIRX_BIST_SEL, hdmirx_bist_parents, 0xC0, 0, 3, 7),
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