Searched refs:CLK_TOP_HIF_SEL (Results 1 – 6 of 6) sorted by relevance
| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7622.c | 344 MUX_GATE_FLAGS(CLK_TOP_HIF_SEL, eth_parents, 0x90, 8, 3, 15,
475 GATE_PCIE(CLK_PCIE_P1_AXI_EN, CLK_TOP_HIF_SEL, 15),
481 GATE_PCIE(CLK_PCIE_P0_AXI_EN, CLK_TOP_HIF_SEL, 21),
485 GATE_PCIE(CLK_SATA_AXI_EN, CLK_TOP_HIF_SEL, 27),
551 GATE_SSUSB(CLK_SSUSB_DMA_EN, CLK_TOP_HIF_SEL, 8),
|
| A D | clk-mt7629.c | 146 FACTOR1(CLK_TOP_TO_USB3_DMA, CLK_TOP_HIF_SEL, 1, 1),
148 FACTOR1(CLK_TOP_FROM_TOP_AXI, CLK_TOP_HIF_SEL, 1, 1),
397 MUX_GATE_FLAGS(CLK_TOP_HIF_SEL, hif_parents, 0x90, 8, 3, 15,
|
| /u-boot/include/dt-bindings/clock/ |
| A D | mt7629-clk.h | 108 #define CLK_TOP_HIF_SEL 94 macro
|
| A D | mt7622-clk.h | 90 #define CLK_TOP_HIF_SEL 77 macro
|
| /u-boot/arch/arm/dts/ |
| A D | mt7629.dtsi | 92 clocks = <&topckgen CLK_TOP_HIF_SEL>;
94 assigned-clocks = <&topckgen CLK_TOP_HIF_SEL>;
|
| A D | mt7622.dtsi | 113 clocks = <&topckgen CLK_TOP_HIF_SEL>;
|
Completed in 9 milliseconds